1. Technical Field
The present invention relates to a test system and a probe apparatus. In particular, the present invention relates to a test apparatus for testing a plurality of semiconductor chips formed on a semiconductor wafer, and to a probe apparatus electrically connected to the plurality of semiconductor chips formed on the semiconductor wafer.
2. Related Art
One way of examining a semiconductor chip formed on a semiconductor wafer uses a semiconductor wafer container containing therein the semiconductor wafer (e.g., see Patent Document No. 1). Such a semiconductor wafer container is formed by a retaining plate for retaining a semiconductor wafer, a wire substrate provided with a probe to be connected to a terminal of a semiconductor chip, and a sealing material hermetically sealing between the retaining plate and the wire substrate. By the decompression of the hermetically sealed space, the probe of the wire substrate is connected to the terminal of the semiconductor chip.
Patent Document No. 1: Japanese Patent Application Publication No. H8-5666
Regarding this technology, when the interval between terminals for the wire substrate is different from the interval between terminals for the semiconductor chip, one possible method for dealing with this is to insert a pitch conversion substrate between the wire substrate and the semiconductor chip. With this method, it is possible to fix the pitch conversion substrate to the wire substrate. However, when a pitch conversion substrate has a different thermal expansion coefficient from that of a wire substrate, fixing these substrates together will cause stress onto the fixing portion therebetween due to change in temperature. On the contrary, when the pitch conversion substrate is not fixed to the wire substrate, when moving the retaining plate to convert the semiconductor wafer to be tested, the pitch conversion substrate falls off from the wire substrate.
No prior art has revealed a configuration by which a substrate inserted between a wire substrate and a wafer to be tested is retained without causing the above-mentioned problem. Likewise, no prior art has revealed a configuration of electrically connecting these substrates.